Publications

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    2014

    Journals:


  1. A. Agrawal, M. Barth, H. Madan, Yi-Jing Lee, You-Ru Lin, Cheng-Hsien Wu, Chih-Hsin Ko, C. H. Wann, D. Loubychev, A. Liu, J. Fastenau, J. Lindemuth, and S. Datta "Comparative analysis of hole transport in compressively strained InSb and Ge quantum well heterostructures", Applied Physics Letters 105, 052102, August 5, 2014. [PDF]
  2. N. Shukla, T. Joshi, S. Dasgupta, P. Borisov, D. Lederman, and S. Datta "Electrically induced insulator to metal transition in epitaxial SmNiO3 thin films", Applied Physics Letters 105, 012108, July 11, 2014. [PDF]
  3. H. Liu, M. Cotter, S. Datta, and V. Narayanan, "Soft-Error Performance Evaluation on Emerging Low Power Devices", IEEE Transactions on Device and Materials Reliability, vol. 14, no. 2, June 3, 2014. [PDF]
  4. N. Shukla, A. Parihar, E. Freeman, H. Paik, G. Stone, V. Narayanan, H. Wen, Z. Cai, V. Gopalan, R. Engel-Herbert, D. G. Schlom, A. Raychowdhury, and S. Datta "Synchronized charge oscillations in correlated electron systems", Scientific Reports 4:4964, May 14, 2014 [PDF]
  5. A. Agrawal, J. Lin, M. Barth, R.White, B. Zheng, S. Chopra, S. Gupta, K. Wang, J.Gelatos, S. Mohney, and S. Datta "Fermi level depinning and contact resistivity reduction using a reduced titania interlayer in n-silicon metal-insulator-semiconductor ohmic contacts", Applied Physics Letters Vol.104, 112101, March 17, 2014. [PDF]
  6. M. Hollander, H. Madan, N. Shukla, D. Snyder, J. Robinson, and S. Datta, "Short-channel graphene nanoribbon transistors with enhanced symmetry between p- and n-branches", Appl. Phys. Express, 7, 055103 (2014). [PDF]
  7. R. Pandey, V. Saripalli, J.P. Kulkarni, V. Narayanan, and S. Datta, "Impact of Single Trap Random Telegraph Noise on Heterojunction TFET SRAM Stability ", IEEE Electron Device Letters Vol. 35. NO. 3, March 2014 [PDF]
  8. S Datta, H. Liu, and V. Narayana "Tunnel FET technology: A reliability perspective", Microelectronics Reliability, March 3, 2014. [PDF]
  9. R. Pandey, B. Rajamohanan, H. Liu,V. Narayanan, and S. Datta, "Electrical Noise in Heterojunction Interband Tunnel FETs", IEEE Transactions on Electron Devices, vol. 61, no.2, pp: 552-559, February 2014. [PDF]
  10. A. V. Thathachary, N. Agrawal, L. Liu, and S. Datta, "Electron Transport in Multigate InxGa1-x As Nanowire FETs: From Diffusive to Ballistic Regimes at Room Temperature", Nano Letters 2014 Feb 12;14(2):626-33. [PDF]
  11. B. Rajamohanan, D. Mohata, Y. Zhu, M. Hudait, Z. Jiang, M. Hollander, G. Klimeck, and S. Datta "Design, fabrication, and analysis of p-channel arsenide/antimonide hetero-junction tunnel transistors" J. Appl. Phys. 115, 044502. January 2014 [PDF]
  12. Conferences:

  13. Matthew J. Hollander, Himanshu Madan, Gregory Pastir, Randal Cavalero, David Snyder, Joshua A. Robinson, and Suman Datta. "Enhanced Short-channel Performance and p-n Symmetry in Graphene Based Ambipolar Mixer Using Nano-ribbon Geometry ," 4th International Symposium on Graphene Devices, Sept. 2014
  14. Suman Datta, Nikhil Shukla, Matthew Cotter, Abhinav Parihar, Arijit Raychowdhury, "Neuro Inspired Computing with Coupled Relaxation Oscillators", Proceedings of the The 51st Annual Design Automation Conference on Design Automation Conference (DAC), pp 1-6, June 2014
  15. Thathachary, Arun V., Agrawal, N., Lavallee G.,Cantoro M.,Kim Sang-Su,kim Dong-Won and Datta S. "Investigation of InxGa1-xAs FinFET architecture with varying Indium (x) concentration and quantum con nement" IEEE Symposia on VLSI Technology, Honolulu, June, 2014. [PDF]
  16. Datta, S. , Pandey, R. ; Agrawal, A. ; Gupta, S.K. ; Arghavani, R. "Impact of contact and local interconnect scaling on logic performance " IEEE Symposia on VLSI Technology, Honolulu, June, 2014. [PDF]
  17. Vijaykrishnan Narayanan, Suman Datta, Gert Cauwenberghs, Don Chiarulli, Steve Levitan,and Philip Wong, "Video Analytics Using Beyond CMOS Devices", Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014 March 2014 [PDF]
  18. Chian-We Liu, Chang-En Chiang, Ching-Yi Huang, Chun-Yao Wang, Yung-Chih Chen§, Suman Datta, Vijaykrishnan Narayanan, "Width Minimization in the Single-Electron Transistor Array Synthesis", Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014 March 2014 [PDF]
  19. 2013

    Journals:


  20. E. Freeman, G Stone, N. Shukla, H. Paik, J. A. Moyer, Z. Cai,H. Wen, R. Engel-Herbert, D. G. Schlom V. Gopalan, and S. Datta "Nanoscale structural evolution of electrically driven insulator to metal transition in vanadium dioxide", in Applied Physics Letters Vol.103, Issue 26 December 30, 2013. [PDF]
  21. N. Agrawal, Y, Kimura, R. Arghavani, and S. Datta, "Impact of Transistor Architecture (Bulk Planar, Trigate on Bulk, Ultrathin-Body Planar SOI) and Material (Silicon or III Semiconductor) on Variation for Logic and SRAM Applications", IEEE Transactions on Electron Devices, vol. 60, no.10, pp: 3298-3304, October 2013. [PDF]
  22. B. Rajamohanan, D. Mohata, D. Zhernokletov, B. Brennan, R. M. Wallace, R. Engel-Herbert, and S. Datta, "Low-Temperature Atomic-Layer-Deposited High-k Dielectric for p-Channel In0.7Ga0.3As/GaAs0.35Sb0.65 Heterojunction Tunneling Field-Effect Transistor", Appl. Phys. Express, 6, 101201 (2013). [PDF]
  23. C. Cress and S. Datta, "Nanoscale transistor – Just around the gate", Science, vol. 341, pp. 140-141 (2013) [PDF]
  24. Karthik Swaminathan, Emre Kultursay, Vinay Saripalli, Vijaykrishnan Narayanan, Mahmut Kandemir, Suman Datta, "Steep Slope Devices: From Dark to Dim Silicon," IEEE Micro, vol. 33, no. 5, pp. 50-59, Sept.-Oct. 2013, [PDF]
  25. Yan Zhu, Mantu K. Hudait Dheeraj K. Mohata, Bijesh Rajamohanan, Suman Datta, Dmitri Lubyshev, Joel M. Fastenau, and Amy K. Liu "Structural, morphological, and defect properties of metamorphic In0.7Ga0.3As/GaAs0.35Sb0.65 p-type tunnel field effect transistor structure grown by molecular beam epitaxy" J. Vac. Sci. Technol. B 31(4), pp 041203-1, Jul/Aug 2013 [PDF]
  26. R. Bijesh, D. Mohata, A. Ali, and Suman Datta "Insight into the output characteristics of III-V tunneling field effect transistors " Appl. Phys. Lett. 102, 092105 March 2013 [PDF]
  27. A Ali, H. Madan, M. Barth, J. B. Boos, B. R. Bennett, and S. Datta "Effect of Interface States on the Performance of Antimonide nMOSFETs" IEEE Electron Device Letters Vol. 34. NO. 3, March 2013 [PDF]
  28. YC Chen, S Eachempati, CY Wang, S Datta, Y Xie, V. Narayanan "A Synthesis Algorithm for Reconfigurable Single-Electron Transistor Arrays" CM Journal on Emerging Technologies in Computing Systems (JETC) Volume 9 Issue 1, February 2013 Article No. 5 [PDF]
  29. Ayan Kar, Nikhil Shukla, Eugene Freeman, Hanjong Paik, Huichu Liu, Roman Engel-Herbert,S. S. N. Bhardwaja, Darrell G. Schlom, and Suman Datta "Intrinsic electronic switching time in ultrathin epitaxial vanadium dioxide thin film" Appl. Phys. Lett. 102, 072106 February 2013 [PDF]
  30. L. Liu, V. Narayanan, and S.Datta "A programmable ferroelectric single electron transistor" Appl. Phys. Lett. 102, 053505 February 2013 [PDF]
  31. Y. Zhu, N. Jain, S. Vijayaraghavan, D. K. Mohata, S. Datta, D. Lubyshev, J. M. Fastenau, A. K. Liu, , and M. K. Hudait "Band offset determination of mixed As/Sb type-II staggered gap heterostructure for n-channel tunnel field effect transistor application" J. Appl. Phys. 113, 024319 January 2013 [PDF]
  32. Conferences:

  33. R. Bijesh, H. Liu, H. Madan, D. Mohata, W. Li, N. V. Nguyen, D. Gundlach , C.A. Richter, J. Maier, K. Wang, T. Clarke, J. M. Fastenau, D. Loubychev, W. K. Liu, V. Narayanan and S. Datta, "Demonstration of InGaAs/GaAsSb Near Broken-gap Tunnel FET with Ion=740uA/um, Gm=700uS/um and Gigahertz Switching Performance at VDS=0.5V", IEEE International Electron Device Meeting (IEDM) Technical Digest, pp. 687-690, December 2013 [PDF]
  34. H. Liu, S. Datta, and V. Narayanan "Steep Switching Tunnel FET: A Promise to Extend the Energy Efficient Roadmap for Post-CMOS Digital and Analog/RF Application" International Symposium on Low Power Electronics and Design (ISLPED) Beijing, China, September 4-6, 2013 [PDF]
  35. H. Liu, R. Vaddi, S. Datta, and V. Narayanan "Tunnel FET based Ultra-Low Power, High Sensitivity UHF RFID Rectifier" at International Symposium on Low Power Electronics and Design (ISLPED) Beijing, China, September 4-6, 2013 [PDF]
  36. M. Barth, A. Agrawal, A. Ali, J. Fastenau, D. Loubychev, W.K. Liu and S.Datta "Compressively Strained InSb MOSFETs with High Hole Mobility for P-Channel Application" Device Research Conference (DRC),University of Notre Dame, June 23-26, 2013. [PDF]
  37. Arun V. Thathachary, L. Liu and S.Datta "Impact of fin width scaling on carrier transport in III-V FinFETs" Device Research Conference (DRC),University of Notre Dame, June 23-26, 2013. [PDF]
  38. Matthew J. Hollander, Nikhil Shukla, Nidhi Agrawal, Himanshu Madan, Joshua A. Robinson and Suman Datta "Reduction of Charge Transfer Region Using Graphene Nano-ribbon Geometry for Improved Complementary FET Performance at Sub-Micron Channel Length" Device Research Conference (DRC),University of Notre Dame, June 23-26, 2013. [PDF]
  39. H. Madan, M. J. Hollander, J. A. Robinson, and S. Datta "Analysis and Benchmarking of Graphene Based RF Low Noise Amplifiers " Device Research Conference (DRC),University of Notre Dame, June 23-26, 2013. [PDF]
  40. A. Agrawal, J. Lin, B. Zheng, S. Sharma, S. Chopra, K. Wang, A. Gelatos, S. Mohneyand S. Datta "Barrier Height Reduction to 0.15eV and Contact Resistivity Reduction to 9.1×10-9 ?-cm2 Using Ultrathin TiO2-x Interlayer between Metal and Silicon" 2013 VLSI Symposia,Kyoto, Japan, June 11-14, 2013. [PDF]
  41. H. Madan, M. J. Hollander, J. A. Robinson and S. Datta "Graphene Transistors for Ambipolar Mixing at Microwave Frequencies" 223rd Electrochemical Society Meeting, Toronto, ON, Canada May 14-18 2013 [PDF]
  42. S. Datta, R. Bijesh, H. Liu, D. Mohata, and V. Narayanan "Tunnel Transistors for Energy Efficent Computing" IEEE International Reliability Physics Symposium (IRPS),Monterey, California, April 14- 18 2013 [PDF]
  43. K. Joshi, S. Hung, S. Mukhopadhyay, V. Chaudhary, N. Nanaware, B. Rajamohnan,T. Sato, M. Bevan, A. Wei, A. Noori, B. Mc.Dougal,C. Ni,G. Saheli, C. Lazik, P. Liu, D. Chu, L. Date, S. Datta, A. Brand, J Swenberg, and S. Mahapatra "HKMG Process Impact on N, P BTI: Role of Thermal IL Scaling, IL/HK Integration and Post HK Nitridationg" IEEE International Reliability Physics Symposium (IRPS),Monterey, California, April 14- 18 2013 [PDF]
  44. 2012

    Journals:

  45. S. K. Gupta, J. P Kulkarni, S. Datta and K. Roy, "Heterojunction Intra-band Tunneling (HIBT) FETs for Low Voltage SRAMs" IEEE Transactions on Electron Devices, vol. 59, no.12, pp: 3533-3542, December 2012. [PDF]
  46. Y. Zhu, N. Jain, S. Vijayaraghavan, D. K. Mohata, S. Datta, D. Lubyshev, J. M. Fastenau,A. K. Liu, N. Monsegue, and M. K. Hudait "Defect assistant band alignment transition from staggered to broken gap in mixed As/Sb tunnel field effect transistor heterostructure" J. Appl. Phys. 122, 094312 October 2012. [PDF]
  47. H. Madan, V. Saripalli, H. Liu, and S. Datta, "Asymmetric Tunnel Field-Effect Transistors as Frequency Multipliers" IEEE Electron Device Letters vol. 33, no. 11, pp. 1547-1549, November 2012. [PDF]
  48. D. K. Mohata, R. Bijesh, T. Mayer, J. Fastenau, D. Lubyshev, A. W. K. Liu, and S. Datta, "Barrier Engineered Arsenide-Antimonide Hetero-junction Tunnel FETs with Enhanced Drive Current" IEEE Electron Device Letters vol. 33, no. 11, pp. 1568-1570, November 2012. [PDF]
  49. J. D. Yearsley, J. C. Lin, E. Hwang, S. Datta, and S. E. Mohney "Ultra low-resistance palladium silicide Ohmic contacts to lightly doped n-InGaAs" J. Appl. Phys. 112, 054510, September 2012 [PDF]
  50. Y. Zhu, N. Jain, D. K. Mohata, S. Datta, D. Lubyshev, J. M. Fastenau,A. K. Liu, and M. K. Hudait "Structural properties and band offset determination of p-channel mixed As/Sb type-II staggered gap tunnel field-effect transistor structure" Appl. Phys. Lett. 101, 112106 September 2012. [PDF]
  51. R. Bijesh, I.Ok, S. Mujumdar, C. Hobbs, P. Majhi, R. Janmmy, and S.Datta, "Correlated Flicker Noise and Hole Mobility Characteristics of (110)/<110> Uniaxially Strained SiGe FINFETs" IEEE Electron Device Letters, vol. 33, no. 09, pp. 1237-1239, September 2012. [PDF]
  52. F. Li, R. Misra, Zhao Fang, Y. Wu, P. Schiffer, Q. M. Zhang, S. Tadigadapa and S. Datta, "Magnetoelectric Flexural Gate Transistor with NanoTesla Sensitivity" Journal of MEMS, Aug 2012. [PDF]
  53. Y. Zhu, N. Jain, S. Vijayaraghavan, D. K. Mohata, S. Datta, D. Lubyshev, J. M. Fastenau, W. K. Liu, N. Monsegue, and M. K. Hudait, "Role of InAs and GaAs terminated heterointerfaces at source/channel on the mixed As-Sb staggered gap tunnel field effect transistor structures grown by molecular beam epitaxy" Journal of Applied Physics, 112, 024306 July 2012. [PDF]
  54. A. Agrawal, N. Shukla, K. Ahmed, and S.Datta, "A Unifed Model for Insulator Selection to Form Ultra-Low Resistivity Metal-Insulator-Semiconductor Contacts to n-Si, n-Ge and n-InGaAs" Applied Physics Letters,101, 042108, July 2012. [PDF]
  55. L. Liu, D. K. Mohata, and S. Datta, "Scaling Length Theory of Double-Gate Interband Tunnel Field-Effect Transistors" IEEE Transactions on Electron Devices,59(4), pp. 902-908, April 2012. [PDF]
  56. W. Cho, M. Luisier, D. K. Mohata, S. Datta, D. Pawlik, S. L. Rommel, and G. Klimeck "Full band atomistic modeling of homo-junction InGaAs band-to-band tunneling diodes including band gap narrowing" Applied Physics Letters,100(6), pp. 063504 - 063504-3 ,February 2012. [PDF]
  57. S. Mujumdar, K. Maitra, and S. Datta "Layout dependent strain optimization for p-channel Non-planar Tri-gate Transistors" IEEE Transactions on Electron Devices, 59(1), pp. 72-78,January 2012. [PDF]
  58. Conferences:

  59. H. Madan, M.J. Hollander, M. LaBella, R. Cavalero, D. Snyder, J. A. Robinson and S. Datta, "Record High Conversion Gain Ambipolar Graphene Mixer at 10 GHz Using Scaled Gate Oxide", IEEE International Electron Device Meeting (IEDM) Technical Digest, pp. 76-79, December (2012) [PDF]
  60. Huichu Liu, Matthew Cotter, Suman Datta and Vijay Narayanan, "Technology Assessment of Si and III-V FinFETs and III-V Tunnel FETs from Soft Error Rate Perspective", IEEE International Electron Device Meeting (IEDM) Technical Digest, pp. 577-580, December (2012). [PDF]
  61. E. Kultursay , K. Swaminathan , V. Saripalli, S. Datta , V. Narayanan, and M. Kandemir, "Performance Enhancement under Power Constraints using Heterogeneous CMOS-TFET Multicores" accepted at IEEE/ACM International Conference on Hardware/Software Codesign and System Synthesis, Oct 7-12, 2012. [PDF]
  62. R. Mukundrajan, M. Cotter, V. Saripalli, M. J. Irwin, S. Datta, and V. Narayanan, "Ultra Low Power Circuit Design using Tunnel FETs" 11th IEEE Computer Society Annual Symposium on VLSI (ISVLSI2012), , Aug 19 ¨C 21, Amherst, USA. [PDF]
  63. M. J. Hollander, A. Agrawal, M. S. Bresnehan, M. LaBella, K. A. Trumbull, R. Cavalero, S. Datta, and Joshua A. Robinson, "High Performance, Large Area Graphene Transistors on Quasi-Free- Standing Graphene Using Synthetic Hexagonal Boron Nitride Gate Dielectrics" Device REsearch Conference (DRC), Penn State University, June 18-20, 2012. [PDF]
  64. M. J. Hollander, A. Agrawal, M. S. Bresnehan, M. LaBella, K. A. Trumbull, R. Cavalero, S. Datta, and Joshua A. Robinson, "Effect of Transferred Hexagonal Boron Nitride Dielectrics on Quasi-Freestanding Epitaxial Graphene" Electronic Materials Conference (EMC), Penn State University, June 18-20, 2012. [PDF]
  65. H. Liu, D. K. Mohata, A. Nidhi, V. Saripalli, V. Narayanan and S. Datta, "Exploration of Vertical MOSFET and Tunnel FET Device Architecture for Sub 10nm Node Applications" Device REsearch Conference (DRC), Penn State University, June 18-20, 2012. [PDF]
  66. H. Madan, M. J. Hollander, J. A. Robinson, and S. Datta, "Extraction of Near Interface Trap Density in Top Gated Graphene Transistor Using High Frequency Current Voltage Characteristics" Device REsearch Conference (DRC), Penn State University, June 18-20, 2012. [PDF]
  67. A. Agrawal, J. Park, D. K. Mohata, K. Ahmed, and S.Datta, "Experimental Demonstration of "Cold" Low Contact Resistivity Ohmic Contacts on Moderately Doped n-Ge with in-situ Atomic Hydrogen Clean" Device REsearch Conference (DRC), Penn State University, June 18-20, 2012. [PDF]
  68. E. Freeman, A. Kar, N. Shukla, R. Misra, R. Engel-Herbert, D. Schlom, V. Gopalan, K. Rabe, and S.Datta, "Characterization and Modeling of Metal-Insulator Transition (MIT) Based Tunnel Junctions" Device REsearch Conference (DRC), Penn State University, June 18-20, 2012. [PDF]
  69. N. Agrawal, V.Saripalli, V.Narayanan, Y.Kimura, R.Arghavani, and S.Datta, "Will Strong Quantum Confinement Effect Limit Low Vcc Applications of III-V FinFETs?" Device REsearch Conference (DRC), Penn State University, June 18-20, 2012. [PDF]
  70. R.Bijesh, D. K. Mohata, H. Liu, and S.Datta, "Flicker Noise Characterization and Analytical Modeling of Homo and Hetero-Junction III-V Tunnel FETs" Device Research Conference (DRC), Penn State University, June 18-20, 2012. [PDF]
  71. A. Ali, H. Madan, M. J. Barth, M. J. Hollander, J. B. Boos, B. R. Bennett, and S.Datta, "Antimonide NMOSFET with Source Side Injection Velocity of 2.7x107 cm/s for Low Power High Performance Logic Applications" IEEE Symposia on VLSI Technology and Circuits, Honolulu, June 12-15, 2012. [PDF]
  72. D. K. Mohata, R. Bijesh, Y. Zhu, M. K. Hudait, R. Southwick, Z. Chbili, D. Gundlach, J. Suehle, J. M. Fastenau, D. Loubychev, A. K. Liu, T. S. Mayer, V. Narayanan and S. Datta, "Demonstration of Improved Heteroepitaxy, Scaled Gate Stack and Reduced Interface States Enabling Heterojunction Tunnel FETs with High Drive Current and High On-Off Ratio" IEEE Symposia on VLSI Technology and Circuits, Honolulu, June 12-15, 2012. [PDF]
  73. K. Ahmeda , S. Chopraa, A. Agrawal and S. Datta "Benchmarking of Novel Contact Architectures on Silicon and Germanium" 2012 InternationalSilicon-Germanium Technology and Device Meeting (ISTDM), June 4-6 2012 [PDF]
  74. F. Li, R. Misra, Z. Fang, C. Curwen, Y. Wu, Q. M. Zhang, P. Schiffer, S. Tadigadapa, and S. Datta, "Magnetoelectric Resonant Gate Transistor" Solid-State Sensors, Actuators, and Microsystems Workshop, Hilton Head, June 3-7, 2012. [PDF]
  75. K. Ahmed, A. Agrawal, S. Chopra, and S. Datta, "Benchmarking of Novel Contact Architectures on Silicon and Germanium" International Silicon-Germanium Technology and Device Meeting (ISTDM), June 4, 2012. [PDF]
  76. 2011

    Journals:

  77. E. Hwang, C. Eaton, S. Mujumdar, A. Ali, D. Bhatia, S. Datta, and J. Ruzyllo, "Processing and Characterization of GaSb/High-k dielectric Interfaces" ECS Transactions,vol.41, issue 5, pp.157-162, ¡°Non-Silicon Material Cleaning¡±, October 2011. [PDF]
  78. A. Ali, H. Madan, A. Agrawal, I. Ramirez, R. Misra, J. B. Boos, B. R. Bennett, J. Lindemuth and S. Datta, "Enhancement Mode Antimonide Quantum Well MOSFETs with High Electron Mobility and GHz Small-Signal Switching Performance," IEEE Electron Device Letters, September 2011.[PDF]
  79. Matthew J Hollander, Michael LaBella, Zachary R Hughes, Michael Zhu, Kathleen A Trumbull, Randal Cavalero, David W Snyder, Xiaojun Wang, Euichul Hwang, Suman Datta, and Joshua A Robinson, "Enhanced Transport and Transistor Performance with Oxide Seeded High-k Gate Dielectrics on Wafer-Scale Epitaxial Graphene," Nano Letters, p. 110804163939013, Aug. 2011. [PDF]
  80. Vinay Saripalli, Guangyu Sun, Asit Mishra, Yuan Xie, Suman Datta and Vijaykrishnan Narayanan, "Exploiting Heterogeneity for Energy Efficiency in Chip Multiprocessors," IEEE Journal on Emerging and Selected Topics in Circuits and Systems, June 2011. (Invited paper) [PDF]
  81. E.Hwang, S.Mookerjea, M.K Hudait, S.Datta, "Investigation of scalability of In0.7Ga0.3As quantum well field effect transistor (QWFET) architecture for logic applications," Solid-State Electronics, vol. 62, pp. 82-89, August 2011. [PDF]
  82. D. Mohata, S. Mookerjea, A. Agrawal, Y. Li, T. Mayer, V. narayanan, A. Liu and S. Datta, "Experimental Staggered-Source and N+ Pocket-Doped Channel III-V Tunnel Field-Effect Transistors and Their Scalabilities," Applied Physics Express, vol 4, pp. 024105, February 2011. [PDF]
  83. A. Ali, B. Bennett, B. Boos, H. Madan, A. Agrawal, P. Schiffer, R. Misra and S. Datta, , "Experimental Determination of Quantum and Centroid Capacitance in Arsenide-Antimonide Quantum-Well MOSFETs Incorporating Non-Parabolicity Effect," IEEE Transactions on Electron Devices , vol. 58 , pp. 1397-1403, January 2011. [PDF]
  84. Conferences:

  85. D. K. Mohata, R. Bijesh , S. Mujumdar, C. Eaton, R. Engel-Herbert, T. Mayer, V. Narayanan, J. Fastenau, D. Loubychev, A. Liu and S. Datta, "Demonstration of MOSFET-Like On-Current Performance in Arsenide/Antimonide Tunnel FETs with Staggered Hetero-junctions for 300mV Logic Applications", accepted IEEE International Electron Devices Meeting, Washington DC, Dec. 5-7, 2011
  86. L. Liu, V. Saripalli, V. Narayanan and S. Datta, "Device Circuit Co-Design Using Classical and Non-Classical III-V Multi-Gate Quantum-Well FETs (MuQFETs)", accepted IEEE International Electron Devices Meeting, Washington DC, Dec. 5-7, 2011
  87. V. Saripalli, J. P. Kulkarni, N. Vijaykrishnan and S. Datta, "Variation-Tolerant Ultra Low- Power Heterojunction Tunnel FET SRAM Design", IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), San Diego, CA, June 2011[PDF]
  88. A. Agrawal, A. Ali, R. Misra, P. E. Schiffer, J. B. Boos, B. R. Bennett and S. Datta, "Low Field Electron Transport in Mixed Arsenide Antimonide Quantum Well Heterostructures", Electronic Materials Conference (EMC), Univ. of California, Santa Barbara, June 2011 [PDF]
  89. A. Agrawal, A. Ali, R. Misra, P. E. Schiffer, B. R. Bennett, J. B. Boos and S. Datta, "Experimental Determination of Dominant Scattering Mechanisms in Scaled InAsSb Quantum Well", Device Research Conference (DRC), Univ. of California, Santa Barbara, pp. 27-28, June 2011 [PDF]
  90. R. Bijesh, I. OK, M. Baykan, C. Hobbs, P.Majhi, R.Jammy and S.Datta, "Hole Mobility Enhancement in Uniaxially Strained SiGe FINFETs: Analysis and Prospects", Device Research Conference (DRC), Univ. of California, Santa Barbara, pp. 237-238, June 2011 [PDF]
  91. D. K. Mohata, R. Bijesh, V. Saripalli, T. Mayer and S. Datta,” Self-aligned Gate NanoPillar In0.53Ga0.47As Vertical Tunnel Transistor", Device Research Conference (DRC), Univ. of California, Santa Barbara, pp. 203-204, June 2011 [PDF]
  92. F.  Li, Z. Fang, R. Misra, S. Tadigadapa, Q. Zhang and S. Datta, "Giant magnetoelectric effect in nanofabricated Pb(Zr0.52Ti0.48)O3-Fe85B5Si10 Cantilevers and resonant gate transistors", Device Research Conference (DRC), Univ. of California, Santa Barbara, pp. 237-238, pp. 69-70, June 2011 [PDF]
  93. L. Liu, V. Saripalli, V. Narayanan and S. Datta, "Experimental Investigation of Scalability and Transport in In0.7Ga0.3As Multi-Gate Quantum Well FET (MuQFET)", Device Research Conference (DRC), Univ. of California, Santa Barbara, pp. 17-18, June 2011[PDF]
  94. H. Madan, D. Veksler, Y.T. Chen, J. Huang, N. Goel, G. Bersuker and S. Datta, "Interface States at high-k/InGaAs interface: H2O vs. O3 based ALD Dielectric", Device Research Conference (DRC), Univ. of California, Santa Barbara, pp. 117-118, June 2011 [PDF]
  95. C. D. Young, M. Baykan, A. Agrawal, H. Madan, K. Akarvardar, C. Hobbs, I. OK, W. Taylor, C. E. Smith, M. M. Hussain, T. Nishida, S. Thompson, P. Majhi, P. Kirsch, S. Datta and R. Jammy, "Critical Discussion on (100) and (110) Orientation Dependent Transport : nMOS Planar and FinFET",?i> Intl. Symposium on VLSI Technology (VLSI), Kyoto, Japan, June, 2011. [PDF]
  96. L. Liu, V. Saripalli, E. Hwang, V. Narayanan and S. Datta, "Multi-Gate Modulation Doped In0.7Ga0.3As Quantum Well FET for Ultra Low Power Digital Logic", accepted for publication in 219th Electro chemical Society (ECS) Meeting, Montreal, Canada, May 1-6, 2011. [PDF]
  97. V. Saripalli, A. Misra, S. Datta and V. Narayanan, "An Energy-Efficient Heterogeneous CMP based on Hybrid TFET-CMOS Cores," Design Automation Conference (DAC), San Diego, June 5-10, 2011. [PDF]
  98. Y.C. Chen, S. Soumya, G. Sun, Y. Xie, S. Datta and V. Narayanan, "Automated Mapping for Reconfigurable Single Electron Transistor Arrays," Design Automation Conference (DAC) , San Diego, June 5-10, 2011. [PDF]
  99. 2010

    Journals:

  100. A. Vallett, S. Minassian, P. Kaszuba, S. Datta, J. M. Redwing and T.S. Mayer, "Fabrication and Characterization of Axially Doped Silicon Nanowire Tunnel Field-Effect Transistors," NanoLetters, vol. 10, pp. 4813-4818, November 2010. [PDF]
  101. I. Geppert, M. Eizenberg, A. Ali and S. Datta, "Band offsets determination and interfacial chemical properties of the Al2O3/GaSb system," Applied Physics Letters, vol. 97, pp. 162109, October 2010. [PDF]
  102. F. Li, F. Zhao, Q. M. Zhang and S. Datta, "Low-frequency voltage mode sensing of magnetoelectric sensor in package," Electronics Letters, vol. 46, no. 16, pp. August 2010. [PDF]
  103. A. Ali, H. S. Madan, A. P. Kirk, R. M. Wallace, D. A. Zhao, D. A. Mourey, M. K. Hudait, T. N. Jackson, B. R. Bennett, J. B. Boos, and S. Datta, "Fermi Level Unpinning of GaSb (100) using Plasma Enhanced Atomic Layer Deposition of Al2O3 Dielectric," Applied Physics Letters, vol. 97, pp. 143502, October 2010. [PDF]
  104. W.C. Kao, A. Ali, E. Hwang, S. Mookerjea and S. Datta "Effect of interface states on sub-threshold response of III-V MOSFETs, MOS HEMTs and tunnel FETs", Solid-State Electronics, vol.54, pp. 16665-1668, August 2010. [PDF]
  105. V. Saripalli, L. Liu, S. Datta and V. Narayanan, "Energy-Delay Performance of Nanoscale Transistors Exhibiting Single Electron Behavior and Associated Logic Circuits", Journal of Low Power Electronics, vol. 6, no. 3, pp. October 2010. [PDF]
  106. S. Mookerjea, D. Mohata, T. Mayer, V. Narayanan, S. Datta, "Temperature-Dependent I-V Characteristics of a Vertical In0.53Ga0.47As Tunnel FET," IEEE Electron Device Letters, vol. 31, no. 6, pp. 564-567, June 2010. [PDF]
  107. B. Downey, S. Datta and S. Mohney,"Numerical study of reduced contact resistance via nanoscale topography at metal/semiconductor interfaces," Semiconductor Science and Technology vol. 25, no. 1, pp 1-4, January 2010.[PDF]
  108. A.Ali , H. Madan, S. Koveshnikov, S. Oktyabrsky, R. Kambhampati, T. Heeg, D. Schlom and S. Datta,"Small Signal Response of Inversion Layers in High Mobility In0.53Ga0.47As MOSFETs Made with Thin High-k Dielectrics," IEEE Transactions on Electron Devices vol. 57, no. 4, pp. 742-748, April 2010.[PDF]
  109. F. Li, S. H. Lee, Z. Fang, P. Majhi, Q. Zhang, S. K. Banerjee, and S. Datta, "Flicker Noise Improvement in 100 nm Lg Si0.50Ge0.50 Strained Quantum-Well Transistors using Ultra-Thin Si Cap Layer," IEEE Electron Device Letters, vol. 31, no. 1, pp. 47-49, January 2010.[PDF]
  110. Conferences:

  111. A. Ali, H. Madan, R. Misra, E.Hwang, A. Agrawal, P. Schiffer, J. B. Boos, B. R. Bennett, I. Geppert, M. Eizenberg and S. Datta,"Advanced Composite High-k Gate Stack for Mixed Anion Arsenide-Antimonide Quantum Well Transistors," IEEE International Electron Devices Meeting (IEDM 2010).[PDF]
  112. Z. Fang, F. Li, N. Mokhariwale, S. Datta, and Q. M. Zhang, "Direct integration of magnetoelectric sensors with microelectronics—Improved field sensitivity, signal-to-noise ratio and frequency response,", pp.15-16, IEEE Sensors 2010 Conference, pp. 614?19, Waikoloa, Hawaii, November 2010 [PDF]
  113. S. Datta, A. Ali, S. Mookerjea, V. Saripalli, L. Liu, S. Eachempati, T. Mayer and V. Narayanan, "Non-silicon logic elements on silicon for extreme voltage scaling," Proceedings of the Silicon Nanoelectronics Workshop (SNW), pp.15-16, Honolulu, Hawaii, June 2010 (Invited Talk)[PDF]
  114. S. Datta, ,"Compound Semiconductor Based Tunnel Transistor Logic," Lester Eastman Conference on High Performance Devices (LEC 2010), pp.178-179, Troy, USA, August 2010 (Invited Talk)[PDF]
  115. A. Ali, H. S. Madan, A. P. Kirk, R.M. Wallace, D. A. Zhao, D. A. Mourey, M. Hudait, T. N. Jackson, B. R. Bennett, J. B. Boos, and S. Datta,"Fermi Level Unpinning of GaSb(100) using Plasma Enhanced ALD Al2O3Dielectric," Device Research Conference Digest(DRC 2010) pp. 27-28, South Bend, Indiana, June 2010.[PDF]
  116. E. Hwang, S. Mookerjea, M. Hudait and S. Datta,"Scalability Study of In0.70Ga0.30As HEMTs for 22nm node and beyond Logic Applications ," Device Research Conference Digest(DRC 2010) pp. 61-62, South Bend, Indiana, June 2010.[PDF]
  117. A. Vallett, S. Minassian, S. Datta, J. Redwing and T. Mayer,"Fabrication of Axially-Doped Silicon Nanowire Tunnel FETs and Characterization of Tunneling Current," Device Research Conference Digest (DRC 2010) pp. 273-274, South Bend, Indiana, June 2010.[PDF]
  118. D. Pawlik, M. Barth, P. Thomas, S. Kurinec, S. Mookerjea, D. Mohata, S. Datta, S. Cohen, D. Ritter, S. Rommel,"Sub-Micron In0.53Ga0.47As Esaki Diodes With Record Current Density of 1MA/cm2," IEEE Device Research Conference Digest(DRC 2010) pp. 163-164, South Bend, Indiana, June 2010.[PDF]
  119. D. K. Mohata, D. Pawlik, L. Liu, S. Mookerjea, V. Saripalli, S. Rommel and S. Datta,"Implications of Record Peak Current Density In0.53Ga0.47As Esaki Tunnel Diode on Tunnel FET Logic Applications," Device Research Conference Digest (DRC 2010) pp. 101-102, South Bend, Indiana, June 2010.[PDF]
  120. L. Liu and S. Datta,"Investigation of the Scalability of Ultra Thin Body Double Gate Tunnel FET using Physics based 2D Analytical Model," IEEE Device Research Conference Digest (DRC 2010), pp. 103-104, South Bend, Indiana, June 2010.[PDF]
  121. V. Saripalli, D. K. Mohata, S. Mookerjea, S. Datta and V. Narayanan,"Low Power Loadless 4T SRAM cell based on Degenerately Doped Source (DDS) In0.53Ga0.47As Tunnel FETs," IEEE Device Research Conference Digest (DRC 2010) pp. 103-104, South Bend, Indiana, June 2010.[PDF]
  122. S. Datta, S. Mookerjea, D. Mohata, L. Liu, V. Saripalli, V. Narayanan and T. Mayer, "Compound Semiconductor Based Tunnel Transistor Logic," IEEE CS MANTECH Conference, pp. 203-204, Portland, Oregon, May 2010 (Invited talk by the candidate). [PDF]
  123. S. Datta, "III-V compound?MOSFET and TFET devices," Proceedings of the IEEE 11th Ultimate Integration of Silicon (ULIS) Conference, Glasgow, Scotland, March 2010 (Plenary Talk by the candidate).[PDF]
  124. J. Singh, R. Krishnan, S. Mookerjea, S. Datta, V. Narayanan,"A Novel Si TFET Based SRAM design for Ultra Low-Power 0.3V VDD Applications," Proceedings of 15th Asia Pacific Design Automation Conference (ASP-DAC 2010), Yokohama, Japan, January 2010.[PDF]
  125. V. Saripalli, V.,S. Datta and N. Vijaykrishnan,"Analyzing Energy-Delay Behavior in Room Temperature Single Electron Transistors," International Conference on VLSI Design, India pp. 399-404, Bangalore, India, January 2010.[PDF]

  126. 2009

    Journals:

  127. S. Mookerjea, R. Krishnan, S. Datta and V. Narayanan, "On Enhanced Miller Capacitance in Inter-Band Tunnel Transistors," IEEE Electron Device Letters, vol. 30, no. 10, pp. 1102-1104, October 2009.[PDF]
  128. S. Mookerjea, R. Krishnan, S. Datta and V. Narayanan, "Effective Capacitance and Drive Current for Tunnel-FET (TFET) CV/I Estimation,"IEEE Transactions on Electron Devices, vol. 56, no. 9, pp. 2092-2098, September 2009 .[PDF]
  129. Z. Fang, S. G. Lu, F. Li, S. Datta and Q. M. Zhang, "Enhancing the Magnetoelectric Response of Metglas/Polyvinylidene fluoride Laminates by Exploiting the Flux Concentration Effect", Applied Physics Letters, 112903, September 2009.[PDF]
  130. Conferences:

  131. S. Datta and V. Narayanan, "Green transistors to green architectures" 14th ACM/IEEE international symposium on Low power electronics and design , pp. 429-430 , New York, 2009.[PDF]
  132. S. Mookerjea, D. Mohata, R. Krishnan, J. Singh, A. Vallett, A. Ali, T. Mayer, V. Narayanan, D. Schlom, A. Liu and S. Datta, "Experimental Demonstration of 100nm Channel Length In0.53Ga0.47As-based Vertical Inter-band Tunnel Field Effect Transistors (TFETs) for Ultra Low-Power Logic and SRAM Applications" IEEE International Electron Devices Meeting (IEDM) Technical Digest, pp. 949-951, December, 2009.[PDF]
  133. H. Madan, A.Ali, S. Koveshnikov and S. Datta, "Interface State Response in HfO2 Gated Strained InAs Quantum-well FETs," Accepted in 40th IEEE Semiconductor Interface Specialists Conference (SISC), December 2009.[PDF]
  134. W. C. Kao, E. Hwang, S. Mookerjea and S. Datta, "Impact of Interface States on Sub-threshold Response of III-V MOSFETs, MOS HEMTs and Tunnel FETs", Accepted in 40th IEEE Semiconductor Interface Specialists Conference (SISC), December 2009.[PDF]
  135. A. Ali , H. Madan, S. Koveshnikov, S. Oktyabrsky, R. Kambhampati, T. Heeg, D. Schlom and S. Datta, "Small Signal Response of Inversion Layers in High Mobility In0.53Ga0.47As MOSFETs Made with Thin High-k Dielectrics",ECS Transactions, vol.25, no. 6, pp. 271-284,"Physics and Technology of High-k Gate Dielectrics" October 2009.[PDF]
  136. V. Saripalli, N. Vijaykrishnan and S. Datta, " Ultra Low Energy Binary Decision Diagram Circuits using Few Electron Transistors", Workshop on Nano-Bio Sensing Paradigms and Applications (in conjunction with Nanonet 2009) , October 2009.
  137. Z. Fang, S. Lu, F. Li, N. Mokhariwale, S. Datta and Q.M. Zhang, "Sensitivity enhancement of magnetic sensors based on Metglas/PVDF laminates using the flux concentration effect," Nanoelectronic Devices for Defense and Security Conference (NANO DDS), September 2009.[PDF]
  138. S. Mookerjea and S. Datta, "Band-gap Engineered Hot Carrier Tunnel Transistors," 67th Device Res. Conference (DRC), pp. 121-122, June 2009.[PDF]
  139. A. Ali, S. Mookerjea, E. Hwang, S. Koveshnikov, S. Oktyabrsky, V. Tokranov, M. Yakimov, R. Kambhampati, W. Tsai and S. Datta, "HfO2 Gated, Self Aligned and Directly Contacted Indium Arsenide Quantum-well Transistors for Logic Applications - A Temperature and Bias Dependent Study," 67th Device Research Conference (DRC), pp. 55-56, June 2009.[PDF]
  140. D. J. Pawlik, P. Thomas, M. Barth, K. Johnson, S.L. Rommel, S. Mookerjea , S. Datta, M. Luisier , G. Klimeck, Z.Cheng, J. Li, J.S. Park, J.M. Hydrick, J.G. Fiorenza, and A. Lochtefeld, "Indium Gallium Arsenide on Silicon Interband Tunnel Diodes for NDR-based memory and Steep Subthreshold Slope Transistor Applications," 67th Device Research Conference (DRC), pp. 69-70, June 2009.
  141. S. Mookerjea, R. Krishnan, A. Vallett, T. Mayer and S. Datta, "Inter-band Tunnel Transistor Architecture using Narrow Gap Semiconductors," ECS Transactions, vol. 19, issue 5, pp. 287-292, "Graphene and Emerging Materials for Post-CMOS Applications", May 2009.[PDF]

  142. 2008

    Journals:

  143. D. Schlom, S. Guha and S. Datta, "Gate Oxides Beyond SiO2", MRS Bulletin, pp. 1017-1025, November 2008.
  144. S. H. Lee, P. Majhi, J. Oh, B. Sassman, C. Young, A. Bowonder, W. Y. Loh, J. J. Choi, B. J. Cho, H. D. Lee, P. Kirsch, H. R. Harris, W. Tsai, S. Datta, H. H. Tseng, S. K. Banerjee, and R. Jammy, "Demonstration of Lg 55 nm pMOSFETs With Si/ Si0.25Ge0.75/ Si Channels, High Ion Ioff (5x104), and Controlled Short Channel Effects (SCEs)", IEEE Electron Device Letters, vol 29, No 9, 1017-1020 September 2008.
  145. C. I Kuo, H. T Hsu, E. Y. Chang, C. Y. Chang, Y. Miyamoto, S. Datta, M. Radosavljevic, G. W. Huang and C.T. Lee, "RF and Logic Performance Improvement of In0.7Ga0.3As/InAs/In0.7Ga0.3As Composite-Channel HEMT Using Gate-Sinking Technology", IEEE Electron Device Letters, vol. 29, no. 4, pp. 290-293, April 2008.
  146. Conferences:

  147. N. Goel, D. Heh, S. Koveshnikov, I. OK, S. Oktyabrsky, V. Tokranov, R. Kambhampati, M. Yakimov, Y. Sun, P. Pianetta, C. Gaspe, M. Santos, J. Lee, S. Datta, P. Majhi, and W. Tsai, "Addressing The Gate Stack Challenge For High Mobility InxGa1-xAs Channels For NFETs", International Electron Devices Meeting Technical Digest (IEDM) pp. 363-366, December, 2008.
  148. S. Datta, "Sub-Quarter Volt Supply Voltage III-V Tunnel Transistors for Green Nanoelectronics" 39th IEEE Semiconductor Interface Specialists Conference (SISC), December 2008 (Invited Talk).
  149. V. Saripalli, S. Mookerjea, S. Datta, and V. Narayanan, "Ultra low power signal processing architectures," IEEE Biomedical Circuits and Systems Conference (BioCAS), pp. 333 - 336, Nov. 2008.[PDF]
  150. S. Mookerjea and S. Datta, "Comparative Study of Si, Ge and InAs Based Steep Subthreshold Slope Tunnel Transistors for 0.25V Supply Voltage Logic Applications," 66th Device Research Conference (DRC), pp. 47-48, Jun. 2008.[PDF]
  151. S. Datta, "Compound Semiconductor as CMOS Channel Material - Deja vu or New Paradigm?" 66th Device Research Conference (DRC), pp 33-36, June 2008 (Invited Talk).
  152. S. Eachempati, V. Saripalli, N. Vijaykrishnan and S. Datta, "Reconfigurable BDD Based Quantum Circuits," IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), pp. 61-67, June 2008.
  153. S. Datta, "Enabling Green Transistors with Narrow Bandgap Ccompound Semiconductors", 32nd Workshop on Compound Semiconductor Devices and Integrated Circuits (WOCSDICE), May 2008 (Invited Talk).

  154. 2007

    Journals:

  155. R. Chau, B. Doyle, S. Datta, K. Kavalieros and K. Zhang, "Integrated nanoelectronics for the future", Nature Materials, vol 6, pp. 810-812, November 2007.[PDF]
  156. C. Y. Chang, H. T. Hsu, E. Y. Chang, C. I. Kuo, S. Datta, M. Radosavljevic, M. Miyamoto, G.W. Y. Huang "Investigation of Impact Ionization in InAs-Channel HEMT for High-Speed and Low-Power Applications", IEEE Electron Device Letters, vol. 28, no. 10, pp. 856-858, October 2007.
  157. S. Datta, "III-V field-effect transistors for low power digital logic applications", Journal of Microelectronic Engineering, vol. 84 , no. 9-10, pp. 2133-2137, September 2007.[PDF]
  158. S. Datta, G. Dewey, J. M. Fastenau, M. K. Hudait, D. Loubychev, W. K. Liu, M. Radosavljevic, W. Rachmady and R. Chau, "Ultrahigh-Speed 0.5 V Supply Voltage In0.7Ga0.3As Quantum-Well Transistors on Silicon Substrate", IEEE Electron Device Letters, vol. 28, no. 8, pp. 685-687, August 2007.[PDF]
  159. T. Ashley, L. Buckle, S. Datta, M.T. Emeny, D.G. Hayes, K.P. Hilton, R. Jefferies, T. Martin, T.J. Phillips, D.J. Wallis, P.J. Wilding and R. Chau, "Heterogeneous InSb quantum well transistors on silicon for ultra-high speed, low power logic applications", Electronics Letters, vol. 43 no. 14, July 2007.[PDF]
  160. Conferences:

  161. M. K. Hudait, S. Datta, G. Dewey, J. M. Fastenau, J. Kavalieros, W. K. Liu, D. Lubyshev, R. Pillarisetty, M. Radosavljevic and R. Chau, "Heterogeneous Integration of Enhancement Mode In0.7Ga0.3As Quantum Well Transistor on Silicon Substrate using Thin (<2 um) Composite Buffer Architecture for High-Speed and Low-voltage (0.5V) Logic Applications", International Electron Devices Meeting Technical Digest (IEDM), pp. 625-628, December 2007.[PDF]
  162. S. Datta, "Prospects of Ultra-High Mobility Narrow Gap Semiconductor Quantum Wells for Very Low-Power Logic Applications", International Symposium on Advanced Silicon-based Nano-devices (ISASN), Tokyo, Japan, November 2007
  163. M. Chandhok, S. Datta, D. Lionberger, S. Vesecky "Impact of Line Width Roughness of Intel's 65 nm Process Devices", Proceedings of SPIE, pp. 6519, 2007.

  164. 2006

    Journals:

    Conferences:

  165. J. Kavalieros, B. S. Doyle, S. Datta, G. Dewey and R. Chau "Tri-Gate Transistor Architecture with High-k Gate Dielectrics, Metal Gates and Strain Engineering," Digest of Technical Papers VLSI Technology Symposium, pp.62-63, June 2006.[PDF]
  166. S. Datta, "Antimonide based Quantum Well Transistors for High Speed, Low Power Logic Applications", Proceedings of the International Conference on Indium Phosphide and Related Materials (IPRM), Princeton, pp. 174 - 176, May 2006.
  167. S. Datta, " Emerging Nano-electronic Devices for High-Speed, Low-Power Applications", IEEE VLSI Test Symposium (VTS), Berkeley, May 2006.

  168. 2005

    Journals:

  169. R. Chau, J. Brask, S. Datta, G. Dewey, M. Doczy, B. Doyle, J. Kavalieros, B. Jin, M. Metz, A. Majumdar and M. Radosavljevic, "Application of high-K gate dielectrics and metal gate electrodes to enable silicon and non-silicon logic nanotechnology," Journal of Microelectronic Engineering, vol. 80, no. 17, pp. 1-6, June 2005.[PDF]
  170. R. Chau, S. Datta, M. Doczy, et al. "Benchmarking nanotechnology for high-performance and low-power logic transistor applications," IEEE Transactions on Nanotechnology, vol. 4, no. 2, pp. 153-158, March 2005.[PDF]
  171. Conferences:

  172. S. Datta, T. Ashley, J. Brask, L. Buckle, M. Doczy, M. Emeny, D. Hayes, K. Hilton, R. Jefferies, T. Martin, T. Phillips, D. Wallis, P. Wilding, R. Chau, "85nm gate length enhancement and depletion mode InSb quantum well transistors for ultra high speed and very low power digital logic applications", International Electron Devices Meeting (IEDM) Technical Digest, pp. 763-766, Dec 2005.[PDF]
  173. R. Chau, S. Datta and A. Majumdar, "Opportunities and Challenges of III-V Nanoelectronics for Future High-speed, Low-power Logic Applications," Technical Digest, IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS), pp. 17-20, Nov. 2005.[PDF]
  174. S. Datta, "Silicon and III-V nanoelectronics", Proceedings of the International Conference on Indium Phosphide and Related Materials (IPRM), Glasgow, Scotland, pp. 7 - 8, May 2005
  175. R. Chau, J. Brask, S. Datta, G. Dewey, M. Doczy, B. Doyle, J. Kavalieros, B. Jin, M. Metz, A. Majumdar and M. Radosavljevic, "Emerging Silicon and Non-Silicon Nano-electronic Devices: Opportunities and Challenges for Future High-Performance and Low-Power Computational Applications," Proceedings of Technical Papers, IEEE VLSI-TSA International Symposium on VLSI Technology (VLSI TSA), Hsinchu, Taiwan, pp. 13-16, April 2005.

  176. 2004

    Journals:

  177. R. Chau, S. Datta, M. Doczy, B. Doyle, J. Kavalieros and M. Metz, "High-K/Metal-Gate Stack and Its MOSFET Characteristics," IEEE Electron Device Letters, vol. 25, no. 6, pp. 408-410, June 2004.[PDF]
  178. Conferences:

  179. S. Datta, T. Ashley, A. Barnes, L. Buckle, A. Dean, M. Emeny, M. Fearn, D. Hayes, K. Hilton, R. Jefferies, T. Martin, K. Nash, T. Philips, W. Tang, P. Wilding and R. Chau, "Novel InSb-based Quantum Well Transistors for Ultra-High Speed, Low Power Logic Applications," Proceedings 7th International Conference on Solid-State and Integrated Circuits Technology (ICSICT), pp. 2253-2256, Beijing, China, Oct. 2004
  180. S. Datta, "Advanced Si and SiGe Strained NMOS and PMOS Transistors with High-K/Metal-Gate Stack," Proceedings of the Bipolar/BiCMOS Circuits and Technology Meetings (BCTM), Montreal, Canada, pp. 194-197, Sept. 2004.[PDF]
  181. B. Jin, S. Datta, G. Dewey, M. Doczy, B. Doyle, K. Johnson, J. Kavalieros, M. Metz, U. Shah, N. Zelick and R. Chau, "Mobility Enhancement in Compressively Strained SiGe Surface Channel pMOS(FET) with HfO2/TiN Gate Stack," Proceedings of the ECS 2004 Joint International Meeting, SiGe: Materials Processing and Devices, pp. 111-122, Oct. 2004

  182. 2003

    Journals:

  183. B.S. Doyle, S. Datta, M. Doczy, S. Hareland, B. Jin, J. Kavalieros, T. Linton, A. Murthy, R. Rios, and R. Chau, "High Performance Fully-Depleted Tri-Gate CMOS Transistors," IEEE Electron Device Letters, Vol. 24, No. 4, pp.263-265, April 2003.[PDF]
  184. R. Chau, B. Boyanov, B. Doyle, M. Doczy, S. Datta, S. Hareland, B. Jin, J. Kavalieros, and M. Metz, "Silicon Nano-transistors for Logic Applications," PHYSICA E, Low-Dimensional Systems and Nanostructures, Vol. 19, Issues 1-2, pp.1-5, July 2003.[PDF]
  185. Conferences:

  186. S. Datta, G. Dewey, M. Doczy, B. Doyle, B. Jin, J. Kavalieros, M. Metz, N. Zelick and R. Chau, "High mobility Si/SiGe strained channel MOS transistors with HfO2/TiN gate stacks", International Electron Devices Meeting (IEDM) Technical Digest, pp. 28.1.1 - 28.1.4, December 2003. [PDF]
  187. R. Chau, S. Datta, M. Doczy, J. Kavalieros and M. Metz, "Gate Dielectric Scaling for High-Performance CMOS: from SiO2 to High-K," Extended Abstracts of International Workshop on Gate Insulator (IWGI), Tokyo, Japan, pp.124-126, Nov. 2003.
  188. R. Chau, B. Doyle, M. Doczy, S. Datta, S. Hareland, B. Jin, J. Kavalieros and M. Metz, "Silicon Nano-Transistors and Breaking the 10nm Physical Gate Length Barrier," 61st Device Research Conference (DRC), pp.123-126, June 2003. [PDF]

  189. 2002

    Journals:

    Conferences:

  190. R. Chau, B. Doyle, J. Kavalieros, D. Barlage, A. Murthy, M. Doczy, R. Arghavani, and S. Datta, "Advanced Depleted-Substrate Transistors: Single-gate, Double-Gate and Tri-gate," Extended Abstracts of the International Conference on Solid-State Devices and Materials (SSDM), pp. 68-69, 2002.

  191. 2000

    Journals:

  192. S. Datta, K. P. Roenker, M. M. Cahay and L. M. Lunardi , " Analytical Modeling of Pnp InP/InGaAs Heterojunction Bipolar Transistors," Solid State Electronics , vol. 44, no. 7, pp. 1331-1333, July 2000 .
  193. S. Datta, K. P. Roenker and M. M. Cahay, "A Gummel-Poon Model for Pnp Heterojunction Bipolar Transistors with a Compositionally Graded Base," Solid-State Electronics, vol. 44, no. 6, pp. 991-1000, June 2000.
  194. Conferences:

  195. S. Datta, K. P. Roenker, R. E. Peddenpohl II and M. M. Cahay, "Analysis of High Current Effects on the Performance of Pnp InP-Based Heterojunction Bipolar Transistors," Proceedings of Twelfth International Conference on InP and Related Materials (IPRM), pp. 134-137, May 2000.

  196. 1999

    Journals:

  197. S. Datta, K. P. Roenker and M. M. Cahay , " Emitter Series Resistance Effect of Multiple Heterojunction Contacts for Pnp Heterojunction Bipolar Transistors," Solid-State Electronics , vol. 43, no. 7, pp. 1299-1305, 1999 .
  198. S. Datta, K. P. Roenker and M. M. Cahay , " Hole Transport and Quasi-Fermi Level Splitting at the Emitter-Base Junction in Pnp Heterojunction Bipolar Transistors," Journal of Applied Physics , vol. 85, no. 3, pp. 1949-1955, Feb 1999 .
  199. S. Datta, K. P. Roenker and M. M. Cahay , " Implications of Hole versus Electron Transport Properties for High Speed Pnp Heterojunction Bipolar Transistors," Solid-State Electronics , vol. 43, no. 1, pp. 73-80, Jan 1999 .
  200. Conferences:

  201. S. Datta, K. P. Roenker, and M. M. Cahay , " Base Pushout and High Current Effects in InP-Based Pnp Heterojunction Bipolar Transistors," Proceedings of the State-of-the-Art Program on Compound Semiconductors , Electrochemical Society, vol.99-17, Oct. 1999 .

  202. 1998

    Journals:

  203. S. Datta, S. Shi, K. P. Roenker and M. M. Cahay and W. E. Stanchina , " Simulation and Design of InAlAs/InGaAs Pnp Heterojunction Bipolar Transistors ," IEEE Transactions on Electron Devices , vol. 45, no. 8, pp. 1634-1643, Aug. 1998 .
  204. S. Datta, K. P. Roenker and M. M. Cahay , " A Thermionic-Emission-Diffusion Model for a Graded Base Pnp Heterojunction Bipolar Transistors," Journal of Applied Physics , vol. 83, no. 12, pp. 8036-8045, June 1998 .
  205. Conferences:

  206. S. Datta, K. P. Roenker and M. M. Cahay , " High Current and Two Dimensional Effects in InP-Based Pnp Heterojunction Bipolar Transistors ," Proceedings of the State-of-the-Art Program on Compound Semiconductors , , Electrochemical Society, vol. 98-12, 1998 .

  207. 1997

    Journals:

    Conferences:

  208. S. Datta, S. Shi, K. P. Roenker and M. M. Cahay , " Base Design for Pnp InAlAs/InGaAs Heterojunction Bipolar Transistors ," Proceedings of the State-of-the-Art Program on Compound Semiconductors, Electrochemical Society , vol. 97-1, pp. 272-287, 1997 .
  209. S. Datta, S. Shi, K. P. Roenker, M. M. Cahay and W. E. Stanchina , " Numerical Modeling and Design of Pnp InAlAs-InGaAs Heterojunction Bipolar Transistors ," Proceedings of the Ninth International Conference on InP and Related Materials (IPRM) , pp. 392-395, 1997 .